In conventional single-bit per cell memory devices, the memory cell assumes one of two information storage states, either an "on" state or an "off" state. The binary condition of "on" or "off" defines one bit of information. As a result, a memory device capable of storing n-bits of data requires (n) separate memory cells.
Increasing the number of bits which can be stored using single-bit per cell memory devices depends upon increasing the number of memory cells on a one-for-one basis with the number of bits of data to be stored. Methods for increasing the number of memory bits stored in a memory device composed of single-bit capacity cells have relied upon manufacturing larger die which contain more memory cells or using improved photolithography techniques to build smaller memory cells. Reducing the size of a memory cell allows more cells to be placed on a given area of a single die.
An alternative to single-bit per cell designs is the storage of multiple-bits of data in a single memory cell. One type of memory in which this approach has been followed is an electrically erasable and programmable device known as a flash memory cell. In flash cells, programming is carried out by applying appropriate voltages to the source, drain, and control gate of the device for an appropriate time period. This causes electrons to tunnel or be injected from a channel region to a floating gate. The amount of charge residing on the floating gate determines the voltage required on the control gate to cause the device to conduct current between the source and drain regions. This voltage is termed the threshold voltage, V.sub.t, of the cell. Conduction represents an "on" or erased state of the device and corresponds to a logic value of one. An "off" or programmed state is one in which current is not conducted between the source and drain regions and corresponds to a logic value of zero. By setting the threshold voltage of the cell to an appropriate value, the cell can be made to either conduct or not conduct current for a given set of applied voltages. Thus, by determining whether a cell conducts current at the given set of applied voltages, the state of the cell (programmed or erased) can be found.
A multi-bit or multistate flash memory cell is produced by creating multiple, distinct threshold voltage levels within the device. Each distinct threshold voltage level corresponds to a value of a set of data bits, with the number of bits representing the amount of data which can be stored in the multistate cell. This method allows multiple bits of binary data to be stored within the same memory cell. When reading the state of the memory cell, the threshold voltage value or range of values for which the memory cell conducts current (as determined by comparison with a sense amplifier having a preselected reference value) corresponds to a binary decoded value representing the programmed data. The threshold voltage level for which the cell conducts thus corresponds to a bit set representing the data programmed into the cell. Proper data storage requires that the multiple threshold voltage levels of a multistate memory cell be separated from each other by a sufficient amount so that a level of a cell can be programmed or erased in an unambiguous manner. The specific relationship between the data programmed into the memory cell and the threshold voltage levels of the cell depends upon the data encoding scheme adopted for the cells.
In programming a multistate memory cell, the objective is to apply a programming voltage over a proper time period to store enough charge in the floating gate to move the threshold voltage to a desired level. This level represents a state of the cell corresponding to an encoding of the data which is to be programmed into the cell. However, division of the threshold voltage range for a two state (one bit) cell into multiple threshold voltage levels reduces the margin (threshold voltage difference) between levels. This necessitates tighter system design tolerances and reduced programming verification noise margins so that adjacent levels can be differentiated and programming errors reduced. However, the tightening of the programming and read operation threshold voltage windows leads to slower programming procedures and introduces another potential source of memory system errors.
U.S. Pat. No. 5,043,940, entitled "Flash EEPROM Memory Systems Having Multistate Storage Cells", issued Aug. 27, 1991, describes a method of programming a multistate memory cell in which an iterative read-compare-program cycle is executed. During the cycle, the data intended to be programmed into a memory cell is input to a comparator, along with the outputs from a set of sense amplifiers (each having a different reference voltage) connected to the cell. The output of the sense amplifiers indicates the threshold voltage level to which the cell is programmed. This corresponds to a read operation. If the threshold voltage level of the cell corresponds to the encoded representation of the intended data, then the cell is in the correct state.
However, the disclosure of the '940 patent fails to discuss how the values of the reference voltages are generated and controlled to generate one of the inputs for the sense amplifiers. This is an important detail because an accurate determination of the state of a memory cell during a program verification, erase verification, or read operation depends on the ability to precisely control the value of the reference voltages input to the sense amplifiers. This is particularly true in the case of multistate memory cells where determination of the state of a cell may require knowing that the cell's threshold voltage is greater than one reference value, but below a second reference value, i.e, the threshold voltage of the cell is within a predetermined range of values.
Control of the reference voltage values is also important because the range of threshold voltages which indicate a particular state of a memory cell depends on the memory system operation being carried out, and may vary with ambient conditions such as bias and temperature.
What is desired is an apparatus for determining the state of a multistate memory cell during a programming verify, erase verify, or read operation which allows accurate control of the reference voltages used as inputs to the sense amplifiers which determine the threshold voltage of the memory cell.